SK hynix Shows Shared Memory Design for AI Servers

The architecture pools high-capacity memory across GPU and CPU servers, with validation with Intel and partners set to begin in the system-design phase.

Updated on Nov. 13, 2026 in Data Centers

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SK hynix presented a shared memory architecture for AI servers at the Intel AI Summit in Seoul, pooling high-capacity memory across GPU and CPU servers. AI Illustration. Upload story photo >

SK hynix presented a shared memory architecture for AI servers at the Intel AI Summit in Seoul. The design places high-capacity memory in dedicated racks that multiple GPU and CPU servers can reach through high-speed links.

Why it matters

Agentic AI workloads increase demand for memory capacity and bandwidth, and a shared memory pool could ease those constraints for data center operators. SK hynix said validation with Intel, customers and strategic partners will begin in the system-design phase.

In SK hynix's internal test, average time to first token dropped from 80.76 seconds to 15.45 seconds, roughly 81%, when remote CXL DRAM from a shared pool replaced eviction and recompute. The results have not been independently validated, and broader testing is still planned.

The players

SK hynix

A South Korean semiconductor manufacturer and one of the world's largest producers of DRAM and NAND memory chips.

Intel

A U.S. semiconductor company that designs Xeon processors and runs data center certification programs for server memory.

The details

The architecture lets servers draw on a common memory pool instead of relying only on memory attached to each machine, targeting the key-value cache that AI models use during multi-turn inference. CXL lets processors treat external memory as if it were nearby, while RDMA lets machines read one another's memory without routing each request through the main processor.

Timeline

  1. December 2025: SK hynix became the first vendor to receive Intel Data Center certification for a 256 GB DDR5 RDIMM on the Xeon 6 platform.

  2. Thursday, Nov. 12, 2026: SK hynix presented its shared memory architecture at the Intel AI Summit in Seoul.

  3. System-design phase: Validation with Intel, customers and strategic partners is set to begin.

Tech Race

The design extends Compute Express Link (CXL) memory expansion from single machines to a pool shared across multiple GPU and CPU servers. It positions SK hynix alongside rivals pursuing memory-centric AI infrastructure as agentic workloads push memory demand higher.

For operators running AI inference, a shared memory pool could cut the wait before a model returns its first token, which affects response speed for end users. Hardware buyers will not see these racks until validation with Intel and customers is complete.

The takeaway

Memory capacity and bandwidth are becoming limiting factors for AI systems, so architectures that share memory across servers may influence how data centers are built. Watch for independent validation results as Intel and customers test the design.

Further reading

Explore more on Data Centers to see how server memory design is changing AI infrastructure.

Source note: This article includes information reported by TokenPost.