Infineon Launches OptiMOS 7 40 V Power MOSFETs
The new portfolio targets high-frequency power conversion in AI servers, data centers, and telecom infrastructure.
Updated on Nov. 4, 2026 in Semiconductors
Infineon Technologies has launched its OptiMOS 7 40 V switching-optimized power MOSFET portfolio for high-frequency DC-DC power conversion. The devices are aimed at AI servers, data centers, and telecom infrastructure.
Why it matters
Power conversion losses are a growing concern as AI servers and data centers draw more electricity, and efficiency gains at the component level affect overall system performance. The portfolio is positioned to address both conduction and switching losses in these applications.
The IQE010N04LM7CG and IQE010N04LM7CGSC have a maximum RDS(on) of 1.0 mΩ at 10 V gate-source voltage, while the ISCH65N04LM7SC, ISCH69N04LM7SC, and ISC011N04LM7SC reach 0.65 mΩ, 0.69 mΩ, and 1.1 mΩ respectively. The devices are rated for junction temperatures up to 175 °C and support switching frequencies up to 1 MHz in suitable topologies.
The players
Infineon Technologies
Infineon Technologies is a German semiconductor manufacturer known for its power electronics and automotive chip portfolios.
The details
The portfolio balances on-state resistance, output charge, and gate charge to reduce both conduction and switching losses. The devices are optimized for 5 V gate drive and are offered in PQFN 3.3 mm × 3.3 mm source-down center gate packages and PQFN 5 mm × 6 mm drain-down packages with dual-side cooling.
Timeline
• Launch announced November 4, 2026
Tech Race
The OptiMOS 7 extends Infineon's OptiMOS 6 40 V line, cutting maximum RDS(on) by up to 33 percent and output and gate charge by up to 35 percent. The move keeps Infineon competing in the high-efficiency power MOSFET segment used by AI server and data center power supplies.
Engineers designing AI servers, data center power supplies, and telecom equipment may evaluate these devices for higher-efficiency DC-DC converters. Lower conduction and switching losses could reduce heat and energy use in systems built around these power stages.
The takeaway
Power device efficiency gains compound across large server fleets, so component-level improvements can matter at the system scale. Engineers evaluating high-frequency power stages should compare RDS(on), output charge, and gate charge together rather than in isolation.
Further reading
Explore more Semiconductors coverage for context on power device development.
