SEALSQ Completes Technical Evaluation for QS7001 Chip
The QS7001 secure element passes rigorous security testing as part of its ongoing Common Criteria EAL5+ certification process.
Updated on Oct. 27, 2026 in Quantum Computing
Live Poll
Should government standards prioritize mandating high-level security certification for all critical infrastructure hardware?
SEALSQ has successfully completed the technical evaluation phase of the Common Criteria EAL5+ certification for its QS7001 secure element. The hardware platform demonstrated resilience against physical and side-channel attacks during tests conducted by SERMA Safety & Security.
Why it matters
This certification establishes a vital hardware foundation for manufacturers as they prepare to meet future post-quantum cryptography requirements. It verifies the security of hardware critical to safeguarding data against emerging advanced threats.
The QS7001 achieved EAL5 augmented with ALC_DVS.2 and AVA_VAN.5 assurance levels, following successful NIST SP 800-90B Entropy Source Validation. The hardware supports platforms including the VaultIC409 and QVault TPM.
The players
SEALSQ
This company develops semiconductors and secure hardware solutions for the post-quantum cryptography market and is headquartered in Geneva, Switzerland.
SERMA Safety & Security
This organization provides independent testing, assessment, and certification services for hardware and software security components.
The details
Tests conducted by SERMA Safety & Security confirmed the chip's resistance to complex fault-injection and side-channel attacks. The certification process now transitions to mandatory site audits of production and engineering assembly facilities.
Timeline
March 2026: Fault-injection and side-channel testing was finalized.
May 2026: The entropy source received official NIST SP 800-90B validation.
September 30, 2026: Total prospective customer evaluations reached 42.
October 27, 2026: The technical evaluation phase concluded.
January 2027: Planned site audits and V2 post-quantum evaluation.
The Tech Race
This development aligns with the broader industry effort to establish hardware-level defenses against future quantum computing capabilities. It marks a significant shift from legacy security standards toward the post-quantum cryptography benchmarks set by global institutions.
Manufacturers integrating this technology will eventually provide consumers with devices featuring higher levels of cryptographic security. Users benefit from improved data protection as these secure elements become standardized in future hardware products.
The takeaway
Securing hardware against quantum-scale threats is becoming a mandatory requirement for device manufacturers. Companies completing these evaluations now are better positioned to meet the rigorous security standards expected by the market by 2027.
What happens next
Formal site audits in France and the V2 full post-quantum evaluation for the QS7001 hardware are scheduled for January 2027.
Further reading
For more information on evolving security standards, see our Quantum Computing section.
More information
View the latest technical specifications and company updates on the SEALSQ company and technology information portal.
Source note: This article includes information reported by The Manila times.
Live Poll
Should government standards prioritize mandating high-level security certification for all critical infrastructure hardware?
