ChipAgents Launches New AI Chip Design Benchmark

The Build-A-Chip-Bench evaluates AI performance across the entire digital integrated circuit design flow.

Updated on Oct. 21, 2026 in Semiconductors

Isometric editorial illustration of a silicon wafer fragment with geometric circuitry patterns, representing advanced semiconductor design.
ChipAgents released Build-A-Chip-Bench, a new benchmark developed with NVIDIA to evaluate AI performance across end-to-end digital integrated circuit design processes. AI Illustration. Upload story photo >

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Do you believe AI agents are reliable enough to manage complex industrial design processes?

ChipAgents has released a new benchmark called Build-A-Chip-Bench, developed in collaboration with NVIDIA to assess AI agents in digital IC design. The tool tests the ability of AI models to manage technical dependencies across architecture, verification, and physical implementation.

Why it matters

Existing benchmarks often struggle to measure the ability of AI to execute a complete, end-to-end design flow. This new benchmark aims to fill that gap by evaluating agents on designs ranging from 100K to 5M standard cells.

Build-A-Chip-Bench uses designs of 100K to 5M standard cells with strict targets, including a 400 MHz timing goal, a 10 W power limit, and a 12.8 GB/s memory bandwidth cap. Claude Fable 5.1 reached a 65% functional pass rate, while GPT-6 Astra achieved 85%.

The players

ChipAgents

An organization focused on the development of AI-driven tools for integrated circuit design.

NVIDIA

A global technology company known for designing graphics processing units and high-performance computing hardware.

Claude Fable 5.1

An advanced artificial intelligence model tested for its capabilities in digital design workflows.

GPT-6 Astra

A sophisticated artificial intelligence model evaluated against design-specific performance metrics.

The details

AI agents are required to operate within a fixed interface and an open-source EDA environment to prove their effectiveness. The tests ensure agents can successfully handle technical dependencies while adhering to constraints like a 6 mm² area limit and a 15 token per second decode minimum.

Timeline

  1. October 21, 2026: The benchmark was released and documented.

The Tech Race

This benchmark utilizes the open-source EDA environment to standardize how AI agents interact with complex hardware design tools. It shifts the competitive landscape by forcing models to move beyond simple task completion toward autonomous end-to-end chip creation.

For developers and tech users, this benchmark creates a clear metric for judging which AI models can effectively handle the complexities of hardware design. This could lead to more reliable automated tools for chip production and faster development cycles for future electronic components.

The takeaway

The industry is moving toward automated design workflows where AI proficiency in physical implementation is as critical as logic generation. Future development cycles will likely rely on these benchmarks to ensure models can meet stringent power and performance targets.

What happens next

ChipAgents plans to release a live, expanded leaderboard that includes additional AI models and a broader set of chip design tasks in the future.

Further reading

For more on the evolution of hardware engineering, browse the latest news in Semiconductors.

Source note: This article includes information reported by EE Times.

Live Poll

Do you believe AI agents are reliable enough to manage complex industrial design processes?