SK Hynix Unveiled MARS Rack-Scale Memory Architecture
The new architecture aims to overcome AI memory bottlenecks through rack-scale pooling.
Updated on Oct. 13, 2026 in Semiconductors
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SK Hynix introduced its MARS rack-scale memory architecture and High Bandwidth Flash system at the OCP Global Summit 2026. This technology allows for a shared memory pool that decouples memory from individual server constraints.
Why it matters
Traditional processor-centric systems often suffer from resource imbalances that force operators to over-provision expensive GPUs. This architecture seeks to resolve those structural limitations and reduce the total cost of ownership for AI infrastructure.
The MARS architecture provides up to 5x improvement in Time To First Token for AI workloads. Meanwhile, the High Bandwidth Flash system offers 14x the capacity of HBM while maintaining half its bandwidth.
The players
SK Hynix
This South Korean company is a major global manufacturer of semiconductors, specifically specializing in dynamic random-access memory and flash memory chips.
Hoshik Kim
He serves as a Senior Vice President at SK Hynix and led the public introduction of the MARS architecture.
The details
By separating memory from the CPU and GPU, the system creates a shared pool of resources at the rack level. This approach is designed to scale more efficiently than conventional setups, which are frequently constrained by fixed memory-to-processor ratios.
Timeline
July 2026: SK Hynix released OCP HBF specification version 0.7.
October 2026: SK Hynix introduced the MARS architecture at the OCP Global Summit.
Early 2027: The company expects to release HBF specification version 1.0.
Early 2028: SK Hynix plans to provide HBF Cube samples.
The Tech Race
This development represents a shift from processor-centric designs to rack-scale memory pools, directly addressing the scaling limitations currently posed by High Bandwidth Memory (HBM). By evolving beyond the constraints of traditional HBM, SK Hynix is positioning its hardware to support the surging memory demands of next-generation AI inferencing clusters.
For users and developers, this technology promises faster AI performance and more efficient use of hardware, potentially reducing the cost of AI-powered services. The adoption of rack-scale memory could lead to more scalable cloud environments and improved workflow speeds for large-scale data tasks.
The takeaway
The move toward rack-scale memory architecture highlights a critical industry shift toward unbundling processing power and memory storage. Developers should monitor how these shared pools influence future server design and resource allocation for large AI models.
What happens next
SK Hynix plans to release the OCP HBF specification version 1.0 in early 2027, followed by the delivery of HBF Cube samples in early 2028.
Further reading
Learn more about the latest innovations in Semiconductors.
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