Qualcomm Validates HBC Memory Silicon in Lab
Qualcomm's first-generation High Bandwidth Compute silicon passed validation testing in its San Diego labs, with commercial products planned for its Dragonfly AI portfolio.
Updated on Nov. 2, 2026 in Semiconductors
Qualcomm validated its first-generation High Bandwidth Compute (HBC) silicon in its San Diego labs. The company plans to commercialize the technology within its Dragonfly AI portfolio.
Why it matters
Large language models are shifting toward large-scale agentic inference, which is primarily limited by memory bandwidth rather than compute alone. HBC targets the thermal, cost, and power penalties that come with conventional high-bandwidth memory placed off-package.
Testing showed 18 times the memory bandwidth of DDR5 and five times the bandwidth-per-watt efficiency of HBM4 in a two-layer DRAM stack sample. Commercial products will use a four-layer stack, and the reported figures have not been independently verified.
The players
Qualcomm
Qualcomm is a San Diego-based semiconductor company known for its mobile processors and wireless technology, now expanding into data center AI accelerators.
The details
HBC vertically stacks low-power LPDDR memory dies directly onto an active AI accelerator base die using wafer-to-wafer bonding. Qualcomm integrated remapping and redundancy techniques into manufacturing to limit defect propagation across stacked layers.
Timeline
First half of 2027: Dragonfly AI250 accelerator platform scheduled to sample to enterprise customers and hyperscalers.
2027: Planned deployment of the custom Oryon-based C1000 server CPU.
2028: Planned next-generation HBC integration in the Dragonfly AI300 platform.
The Tech Race
HBC arrives as AI workloads move toward agentic inference, a shift that makes memory bandwidth the binding constraint and pressures incumbents built around High Bandwidth Memory (HBM). Qualcomm positions the approach as an alternative to HBM4, which it says incurs steep thermal and power penalties from off-package data movement.
For businesses running AI inference, HBC's claimed efficiency gains could eventually lower the power and cooling costs of accelerator racks. Qualcomm's full Dragonfly AI250 rack is projected to offer 38.6TB of system memory and 7.4 petabytes per second of effective bandwidth, though availability depends on the 2027 sampling timeline.
The takeaway
Memory bandwidth, not raw compute, is increasingly the limiting factor for AI inference, so memory architecture is becoming a competitive battleground. Watch whether independent testing confirms Qualcomm's figures once four-layer commercial parts reach sampling.
What happens next
Qualcomm plans to begin sampling the Dragonfly AI250 platform to enterprise customers and hyperscalers in the first half of 2027.
Further reading
Explore more Semiconductors coverage to see how memory and chip architecture are reshaping AI hardware.
