Researchers Accelerated Cryptographic Computations on NPUs
A new methodology utilizing manual loop fission achieved significant speedups for number theoretic transform tasks on AMD hardware.
Updated on Oct. 14, 2026 in Quantum Computing
Researchers have developed a method to accelerate number theoretic transform (NTT) computations on neural processing units (NPUs). The study demonstrates that these specialized hardware units can effectively handle cryptographic workloads traditionally reserved for GPUs or FPGAs.
Why it matters
Efficient polynomial multiplication is essential for the future of lattice-based post-quantum cryptography and fully homomorphic encryption. Utilizing NPUs for these tasks expands the hardware options available for critical security infrastructure.
The implementation supports polynomial degrees of 4096 for 14-bit moduli and 2048 for 30-bit moduli. Researchers achieved these gains using three configurations based on radix-2, radix-4, and radix-8 structures.
The players
AMD
This semiconductor company provides the AI Engine architecture used as the representative neural processing unit platform for this research.
The details
The team utilized manual loop fission to break down complex loops into smaller primitives, which allows for improved software pipelining on the hardware. By constructing specific Barrett reduction primitives, they built high-throughput implementations optimized for the AMD AI Engine architecture.
Timeline
The methodology for accelerating NTT computations was published on October 14, 2026.
The Tech Race
This development marks a shift in how cryptographic primitives are mapped to specialized AI hardware, moving beyond traditional reliance on general-purpose GPUs. By optimizing lattice-based post-quantum cryptography for NPUs, the industry closes the gap between emerging security needs and available processing capacity.
For developers and hardware engineers, this methodology opens a new path for deploying advanced encryption more efficiently on existing AI-enabled devices. It suggests that future software could leverage NPU hardware for robust security protocols without requiring additional dedicated cryptographic coprocessors.
The takeaway
This research proves that neural processing units are viable platforms for intensive cryptographic math, not just AI inference. Developers should consider exploring NPU-based optimizations to reduce the performance overhead of next-generation encryption standards in their own applications.
Further reading
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