Myrtle.ai Set New STAC-ML Markets Inference Benchmarks
The VOLLO accelerator achieved record-breaking latency and throughput results for trading models.
Updated on Oct. 6, 2026 in Artificial Intelligence
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Myrtle.ai has set new STAC-ML Markets benchmarks for gradient-boosted trees using its VOLLO accelerator. The technology achieved 99th-percentile latencies below 2 microseconds while significantly boosting throughput.
Why it matters
Electronic trading firms prioritize these metrics to deploy sophisticated machine learning models without sacrificing the extreme speed required for competitive market returns.
The VOLLO accelerator hit a 1.77-microsecond p99 latency while sustaining 50 million inferences per second on the smallest tested model. These results were achieved using an AMD Alveo V80LL accelerator within a Blackcore ICON 3132-SM+ server.
The players
Myrtle.ai
A technology company based in Cambridge, England, that specializes in high-performance inference accelerators for machine learning.
AMD
A multinational semiconductor company that produces the Alveo V80LL Compute Accelerator hardware used in the benchmarking test.
Blackcore
A manufacturer of high-performance server hardware that provided the ICON 3132-SM+ platform for the STAC benchmark tests.
The details
The VOLLO platform allows developers to deploy complex models without needing specialized FPGA expertise. By running on industry-standard hardware like the AMD Alveo V80LL, the system optimizes decision trees and neural networks for high-frequency environments.
Timeline
The latest STAC-ML records were unveiled at the STAC Summit in London on October 6, 2026.
Previous STAC Tacana results were announced in April 2026.
The Big Picture
This performance milestone follows the established validation pattern set by the STAC-ML Markets benchmark suite to provide standardized speed metrics for financial technology. Myrtle.ai has successfully extended the existing benchmark records for gradient-boosted trees within this competitive evaluation framework.
Software developers can now deploy powerful gradient-boosted tree models with significantly lower latency hurdles. This efficiency reduces the technical barrier to entry for building high-speed trading applications on FPGAs without requiring deep hardware engineering knowledge.
The takeaway
The ability to run inference at sub-microsecond speeds is becoming a primary competitive advantage for automated financial systems. Firms that adopt accelerators capable of these throughput levels can execute complex decisions faster than traditional CPU-based infrastructures.
Further reading
For more on how new hardware impacts machine learning performance, visit the Artificial Intelligence section.
More information
View the Full STAC audit benchmark results for complete technical specifications.
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