NVIDIA Engineer Submitted Linux Scheduler Improvements
The seventh revision of patches aims to enhance CPU performance for Vera cores on the Linux kernel.
Updated on Oct. 1, 2026 in Semiconductors

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NVIDIA engineer Andrea Righi has submitted a new set of scheduler improvements for the Vera CPU. These changes aim to optimize performance on Olympus cores by refining how the system handles simultaneous multithreading.
Why it matters
The patch series enables more efficient core utilization, which is essential for maximizing throughput in high-performance computing environments. These technical refinements aim to improve how the Linux kernel manages processor idle states.
The update includes a new kernel parameter, sched_smt_asym_packing, and introduces changes across less than one hundred lines of code. Benchmarks show a 3.20 percent throughput increase for OpenBLAS and a 6.73 percent gain for NVPL.
The players
Andrea Righi
An engineer at NVIDIA who is leading the development of Linux kernel scheduler optimizations.
NVIDIA
A multinational technology company specializing in the design and production of graphics processing units and central processing units.
The details
The patches enable preferred SMT siblings on NVIDIA Olympus CPU cores and honor asymmetric SMT priority in the idle selection code path. This seventh revision of the work is designed to force asymmetric packing at the SMT scheduling domain through the new parameter.
Timeline
Andrea Righi wrote about the initial improvements in August 2026.
The seventh revision of the patches was published on October 1, 2026.
The Tech Race
This development follows the long-standing industry pattern of optimizing open-source kernels to support proprietary high-performance silicon. It reflects a broader shift toward tighter hardware-software integration to remain competitive in the data center market.
Developers and systems administrators using Vera CPU cores may see improved workload throughput once the patches are integrated. If approved for Linux v7.4, these changes will provide measurable performance gains for specific scientific and computational libraries.
The takeaway
Iterative improvements to core scheduling remain a primary method for squeezing extra performance out of existing hardware. Developers aiming to implement these gains should monitor the Linux kernel mailing list for future integration updates.
Further reading
Learn more about advancements in processor design and optimization by visiting the Semiconductors section.
Source note: This article includes information reported by Phoronix.
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